前言 *1 章 計算機繫統概論 ·········· 1 1.1 計算機發展簡史 ······················· 1 1.1.1 計算機的產生及發展 ········ 1 1.1.2 計算機的分類 ················ 3 1.1.3 計算機的應用場景 ·········· 7 1.1.4 計算機的發展趨勢 ·········· 9 1.2 計算機繫統簡介 ····················· 10 1.2.1 軟硬件繫統 ·················· 10 1.2.2 計算機層次結構 ············ 11 1.3 計算機繫統的硬件組成 ············ 13 1.3.1 馮·諾依曼原理 ············ 13 1.3.2 計算機的硬件組成 ········· 15 1.4 計算機繫統的性能指標 ············ 17 1.5 習題 ··································· 19 *2 章 計算機中數的表示 ····· 20 2.1 進位計數制及進制轉換 ············ 20 2.2 數的符號表示 ························ 22 2.2.1 無符號數表示 ··············· 22 2.2.2 有符號數表示 ··············· 23 2.2.3 BCD 碼 ······················· 26 2.2.4 字符數據表示 ··············· 28 2.3 數的定點表示和浮點表示 ········· 30 2.3.1 定點表示 ····················· 31 2.3.2 浮點表示 ····················· 31 2.4 實例：IEEE 754 標準 ·············· 34 2.5 數據校驗 ······························ 36 2.5.1 奇偶校驗碼 ·················· 36 2.5.2 海明校驗碼 ·················· 37 2.5.3 循環冗餘校驗碼 ············ 39 2.6 習題 ··································· 41 第3 章 設計 ··········· 44 3.1 邏輯運算和移位運算 ··············· 44 3.1.1 基本邏輯運算 ··············· 44 3.1.2 移位運算 ····················· 45 3.2 定點運算 ······························ 48 3.2.1 加減法運算 ·················· 48 3.2.2 乘法運算 ····················· 52 3.2.3 除法運算 ····················· 63 3.3 浮點運算 ······························ 69 3.3.1 加減法運算 ·················· 70 3.3.2 乘除法運算 ·················· 72 3.4 算術（ALU） ············· 75 3.4.1 並行加法器與快速進 位鏈 ··························· 75 3.4.2 AL ···················· 80 3.5 習題 ··································· 81 第4 章 存儲器繫統 ·············· 84 4.1 存儲器的分類及層次結構 ········· 84 4.1.1 存儲器的分類 ··············· 84 4.1.2 存儲器的層次結構 ········· 85 4.2 主存儲器 ······························ 87 4.2.1 概述 ··························· 87 4.2.2 隨機存儲器（RAM） ······· 92 4.2.3 隻讀存儲器（ROM） ······· 98 4.2.4 存儲器與CPU 的連接 ··· 104 4.2.5 存儲器的擴展 ············· 105 4.3 高速緩衝存儲器（Cache） ······· 111 4.3.1 概述 ························· 111 4.3.2 Cache 的工作原理 ········ 112 目 錄 V 4.3.3 Cache 的調度與替換 ····· 114 4.4 虛擬存儲器 ·························· 117 4.4.1 頁式虛擬存儲器 ·········· 118 4.4.2 段式虛擬存儲器 ·········· 119 4.4.3 段頁式虛擬存儲器 ······· 120 4.5 輔助存儲器 ·························· 121 4.5.1 磁記錄原理與記錄 方式 ························· 121 4.5.2 硬磁盤存儲器 ············· 123 4.5.3 光盤及其他輔助存儲器 ·· 125 4.6 習題 ·································· 127 第5 章 指令繫統 ················ 130 5.1 機器指令 ····························· 130 5.1.1 指令格式 ··················· 130 5.1.2 指令的操作碼 ············· 131 5.1.3 指令的地址碼 ············· 132 5.1.4 指令字長 ··················· 134 5.2 指令類型與數據類型 ·············· 135 5.2.1 指令類型 ··················· 135 5.2.2 數據類型 ··················· 138 5.3 尋址方式 ····························· 140 5.3.1 指令尋址 ··················· 140 5.3.2 數據尋址 ··················· 141 5.3.3 尋址方式綜合例題 ······· 148 5.4 RISC 技術 ··························· 150 5.4.1 RISC 的原理 ··············· 150 5.4.2 RISC 的特點 ··············· 151 5.4.3 RISC 與CISC 的比較 ···· 152 5.5 習題 ·································· 152 第6 章 CPU 的結構與設計 ··· 156 6.1 CPU 的功能和組成 ················ 156 6.1.1 CPU 的功能 ················ 156 6.1.2 CPU 的組成 ················ 158 6.2 多級時序與時序繫統 ·············· 165 6.2.1 時序控制方式 ············· 165 6.2.2 指令周期與多級時序 ····· 167 6.3 組合邏輯控制器設計 ·············· 171 6.3.1 模型機基本設計 ·········· 172 6.3.2 微操作的節拍安排 ······· 174 6.3.3 模型機組合邏輯控制器 設計 ························· 176 6.4 微程序控制器設計 ················· 179 6.4.1 微程序基本原理 ·········· 179 6.4.2 微程序控制器基本 結構 ························· 180 6.4.3 微指令格式設計 ·········· 181 6.4.4 模型機微程序設計 ······· 185 6.5 改進與提升CPU 性能的技術 ··· 189 6.5.1 流水線技術 ················ 189 6.5.2 同步多線程與超線程 ····· 195 6.5.3 多核技術 ··················· 195 6.6 習題 ·································· 196 第7 章 繫統總線 ················ 199 7.1 概述 ·································· 199 7.1.1 總線的基本概念 ·········· 199 7.1.2 總線的分類 ················ 200 7.1.3 總線的特性和性能 指標 ························· 201 7.2 總線結構和總線標準化 ··········· 203 7.2.1 單總線結構 ················ 203 7.2.2 多總線結構 ················ 205 7.2.3 總線的標準化 ············· 208 7.3 總線控制 ····························· 211 7.3.1 總線的判優控制 ·········· 211 7.3.2 總線的通信控制及信息 傳送方式 ··················· 213 7.4 習題 ·································· 218 第8 章 輸入輸出繫統 ·········· 221 8.1 I/O 設備 ······························ 221 8.1.1 I/O 設備的分類 ············ 221 8.1.2 輸入設備 ··················· 222 8.1.3 輸出設備 ··················· 224 8.1.4 其他I/O 設備 ·············· 233 8.2 I/O 接口 ······························ 236 VI 計算機組成原理 8.2.1 接口的概念 ················ 236 8.2.2 主機與I/O 設備的信息 交換 ························· 236 8.2.3 接口的功能 ················ 237 8.2.4 接口的結構 ················ 238 8.2.5 接口的編址方式 ·········· 238 8.3 程序直接控制方式 ················· 239 8.3.1 無條件傳送方式 ·········· 239 8.3.2 條件傳送方式 ············· 239 8.4 程序中斷方式 ······················· 242 8.4.1 中斷的基本概念 ·········· 242 8.4.2 中斷的處理過程 ·········· 243 8.4.3 程序中斷方式接口電路 和I/O 中斷的處理過程 ·· 247 8.5 DMA 方式 ··························· 248 8.5.1 DMA 方式的基本概念 ··· 248 8.5.2 DMA 傳送方式 ············ 249 8.5.3 DMA 控制器的組成及 功能 ························· 250 8.5.4 DMA 的工作過程 ········· 252 8.5.5 DMA 控制器與繫統的 連接方式 ··················· 253 8.5.6 選擇型和多路型DMA 控制器 ······················ 254 8.5.7 DMA 方式的特點 ········· 256 8.6 習題 ·································· 256 附錄 ·································· 258 附錄A 基本邏輯門電路 ··············· 258 附錄B 組合邏輯器件 ·················· 258 附錄C 基本時序電路 ·················· 260 參考文獻 ···························· 262 | 
